>RVC is an ISA extension and not all implementations support it. I have never seen a commercially-produced RISC-V core that doesn't include the C extension. It

>RVC is an ISA extension and not all implementations support it. I have never seen a commercially-produced RISC-V core that doesn't include the C extension. It's simply too cheap and too useful to leave out. You make back the cost of the C decoder in probably the first 1 or 2 KB of ITIM/icache. The only things that don't have the C extension are educational examples/student projects and extremely simple cores for FPGA uses where they probably run controller code with just a few dozen instructions. You'll certainly never see anything with 64 bit, an MMU, or an FPU that doesn't have the C extension. You could do it, but it's stupid.