5 ms·

Bear in mind that a the current generation of these, the Virtex 6, starts at about $800 for the smallest parts and I believe goes well over $20k for the larger

by tryp 15y ago

Bear in mind that a the current generation of these, the Virtex 6, starts at about $800 for the smallest parts and I believe goes well over $20k for the larger ones. Expect the Virtex 7 to be priced in this ballpark. edit: I was off by an order of magnitude on the high end. $2k -> $20k

bsandbox 15y ago
Yes, initially. But as the manufacturing processes mature, these prices reduce dramatically over time. Price reductions of an order of magnitude are not unusual over the course of two or three years.
- tryp 15y ago
  I meant this more as a data point for realistic mental comparison to an ASIC, or anyone thinking they might use one. It's cool that it's achievable, and saying "This (big-n) gate count part is available today!" is nice and gee-whizzy for the press release and trade mags, but divorced from it's cost doesn't mean much to someone who would put it to work, as I'd expect at least a few here on HN to be. High-end Virtex 4 parts from 2004 still cost over $10k. These aren't the devices you design into products unless your market is low volume, high margin, and long life-cycle. This is the part you buy to prototype your own ASIC design.
  - rbanffy 15y ago
    Considering my current rhythm, by the time I finish learning VHDL, it'll be available for US$10 a piece ;-)
    - aiscott 15y ago
      I'd consider spending time with SystemVerilog.
      - rbanffy 15y ago
        Sounds intriguing. I am not sure where to start from, however. http://en.wikipedia.org/wiki/SystemVerilog http://en.wikipedia.org/wiki/SystemVerilog
ajross 15y ago
It's a monster chip. I don't see a die area number, but at 6.8G transistors that would place it at about twice the size of the biggest Geforce dies. So yields are going to be lower due to simple scaling constraints (though FPGAs no doubt have lots of redundancy by their nature, so some failures probably don't kill the chip). And it's 28nm, which is a brand new process and won't yield as well. AND big FPGAs are a low volume market. So yes, I wouldn't expect these to be cheap. They're not consumer SoC parts.
- jlp3 15y ago
  You're quite right, a traditional die with 6.8 billion transistors on it would likely have serious yield issues. This is why Xilinx is using the silicon interposer to combine multiple die into a single package. So it's not actually 1 6.8b transistor die but 4 roughly 1.7b transistor die. Still huge, but in line with the level of integration that others (Intel, IBM) are using.

by tryp 15y ago

bsandbox 15y ago

Yes, initially. But as the manufacturing processes mature, these prices reduce dramatically over time. Price reductions of an order of magnitude are not unusual over the course of two or three years.

tryp 15y ago
I meant this more as a data point for realistic mental comparison to an ASIC, or anyone thinking they might use one. It's cool that it's achievable, and saying "This (big-n) gate count part is available today!" is nice and gee-whizzy for the press release and trade mags, but divorced from it's cost doesn't mean much to someone who would put it to work, as I'd expect at least a few here on HN to be. High-end Virtex 4 parts from 2004 still cost over $10k. These aren't the devices you design into products unless your market is low volume, high margin, and long life-cycle. This is the part you buy to prototype your own ASIC design.
- rbanffy 15y ago
  Considering my current rhythm, by the time I finish learning VHDL, it'll be available for US$10 a piece ;-)
  - aiscott 15y ago
    I'd consider spending time with SystemVerilog.
    - rbanffy 15y ago
      Sounds intriguing. I am not sure where to start from, however. http://en.wikipedia.org/wiki/SystemVerilog http://en.wikipedia.org/wiki/SystemVerilog

ajross 15y ago

It's a monster chip. I don't see a die area number, but at 6.8G transistors that would place it at about twice the size of the biggest Geforce dies. So yields are going to be lower due to simple scaling constraints (though FPGAs no doubt have lots of redundancy by their nature, so some failures probably don't kill the chip). And it's 28nm, which is a brand new process and won't yield as well. AND big FPGAs are a low volume market. So yes, I wouldn't expect these to be cheap. They're not consumer SoC parts.

jlp3 15y ago
You're quite right, a traditional die with 6.8 billion transistors on it would likely have serious yield issues. This is why Xilinx is using the silicon interposer to combine multiple die into a single package. So it's not actually 1 6.8b transistor die but 4 roughly 1.7b transistor die. Still huge, but in line with the level of integration that others (Intel, IBM) are using.