3 ms·
You're right, it was a single core Celeron (IIRC). I assume it would be way harder with a quad core. Two (running) cores can be manageable, except if the second
by snippyhollow 15y ago
You're right, it was a single core Celeron (IIRC). I assume it would be way harder with a quad core. Two (running) cores can be manageable, except if the second core executes a program specifically designed to scramble the ultrasonic signal.
- zdw 15y agoAlso, newer CPU's often will have instructions expressly created to perform the cryptographic work. I'd posit that these, along with the reduced overall time of the calculation, would greatly inhibit any attack of this nature.
- duskwuff 15y agoFor AES, yes. For RSA, no.
- maaku 15y agoIt's called Montgomery multiplication. VIA has had it in their CPUs for quite some time now. I don't know about AMD or Intel.
- marshray 15y agoIntel has the AES-NI instruction in some chips. This is said to reduce the side channels considerably. (Have fun figuring out if that laptop at the store actually has it though. The "Core I7" designation isn't enough.)
- duskwuff 15y agoAgain, that's just for AES, which isn't what's being discussed in this article. RSA is a totally different beast.
- duskwuff 15y agoI believe it's VIA-only at the moment. I'm not quite familiar enough with Montgomery multiplication to say if PCLMULQDQ is comparable; I suspect it isn't, though.