3 ms·

Using specialized instructions not always turn into performance improvements. Processors are pretty smart these days and the generated u-ops may be the same

• incrudible 4y ago
  In my experience, even some of the simplest loops that a compiler can trivially vectorize do get a noteworthy speedup from using SIMD instructions.
  • Const-me 4y ago
    Upgrading from scalar to SSE vector, I often see an improvement by a large factor like 3-4. Sometimes, for smaller integer lanes or bytes, much more. When upgrading vectors from SSE to AVX, the speedup is very rarely by a factor of 2. More often it's within 30-70%. I never programmed AVX512, but I would expect for real-life code AVX512/AVX2 performance improvement to be much closer to AVX/SSE than to SSE/scalar.
    • incrudible 4y ago
      There is definitely an argument to be made regarding uops that just because the vector width of the interface doubled, the hardware resouces need not have doubled as well. AVX512 originally came from KNL accelerators, which were designed for more specific purposes.
      • Const-me 4y ago
        I agree. And these resources are not even limited to execution units inside cores. Another one is bandwidth. On computers with dual-channel DDR4, aligned SSE vectors are delivered from main memory with a single transaction. For ideal scaling from SSE, AVX512 would need octa-channel DDR4, and 4x as much caches. Another one is waste heat. On modern processors, sustained performance is often limited by thermals. For ideal scaling, AVX512 would need twice as much cooling compared to AVX.