1. When quoting the latency of an instruction, it is customary to quote the latency that the instruction itself adds to a dependency chain. CMOV itself had inde

1. When quoting the latency of an instruction, it is customary to quote the latency that the instruction itself adds to a dependency chain. CMOV itself had indeed higher latency on P4 (Although Agner only claims 6 cycles, not 10 like Linus). Still, the advantage of conditional branches is that they do indeed break dependency chains and allow OoO execution, whether that's a win or not depend on the prediction rate of the specific branch and the length of the chain. 2. Well I only checked Agner for Ice (which BTW came out in 2019). But CMOV has had a 1 clock latency since Broadwell (2014). It had been 2 clock cycles for a few generation before. The number of generated uops has also significantly decreased.