3 ms·
A couple responses: 1. If the values the source registers aren't computed yet (due to prediction, renaming, etc.), then CMOV will need to stall until they're c
by dataflow 4y ago
A couple responses:
1. If the values the source registers aren't computed yet (due to prediction, renaming, etc.), then CMOV will need to stall until they're computed, right? And those could be pretty long prediction chains. So I don't follow as how you can regard this as just a 1-cycle thing on any architecture.
2. Didn't Ice Lake come out literally just 1 year ago? "Out of date" seems like quite an exaggeration... I don't have a single machine that new and I don't imagine most people purchase a new computer on an annual basis either.
- gpderetta 4y ago1. When quoting the latency of an instruction, it is customary to quote the latency that the instruction itself adds to a dependency chain. CMOV itself had indeed higher latency on P4 (Although Agner only claims 6 cycles, not 10 like Linus). Still, the advantage of conditional branches is that they do indeed break dependency chains and allow OoO execution, whether that's a win or not depend on the prediction rate of the specific branch and the length of the chain. 2. Well I only checked Agner for Ice (which BTW came out in 2019). But CMOV has had a 1 clock latency since Broadwell (2014). It had been 2 clock cycles for a few generation before. The number of generated uops has also significantly decreased.
- jabl 4y agoWrt #2, there is the additional argument that when selecting compiler optimizations for a -mtune=generic (or equivalent) target, it makes sense to be a bit "forward leaning", as it'll be a while before your work ends up in a released version, and even further time goes by until that compiler release ends up in the hands of users.