5 ms·

I implemented Conways Game of Life in TTL and oscilloscope for my 1975 MIT digital circuits lab. The clock was 6 nanoseconds or 166 MHz. The limiting chip was o

I implemented Conways Game of Life in TTL and oscilloscope for my 1975 MIT digital circuits lab. The clock was 6 nanoseconds or 166 MHz. The limiting chip was one kilobit RAM which was in tight supply and expensive. I think we used two for alternating generations. There are similarities to the pong circuit.

codedokode 4y ago
What logic family did you use? Standard 74-series TTL chips that existed in 1975 are unlikely to work at 166Mhz, their propagation delay was around 20 ns.
- snek_case 4y ago
  The 1 kbit RAM chip probably also would have difficulty running at 166MHz. That being said, having the master clock of the system running at 166MHz doesn't mean the entire thing does. You could use a high clock rate to generate a video signal but have the actual logic of the system behind a clock divider running at a much lower frequency.
  - dahart 4y ago
    My hardware design prof in undergrad had a story about one of the chip manufacturers having some cray fast internal clock in the 70s or 80s that was running microcode to implement the processor’s ISA. In my (probably faulty) memory I think the story was something like 800 MHz made by a weird brand (weird to my naive undergrad brain) like Rockwell or something, while the instruction clock presented to the user was maybe in the single or double digit MHz. No idea if I’m remembering right, and my Google Fu is failing to verify this story. But anyway, to your point, modern GPUs have a bunch of different clocks for different sub-systems.
- loser777 4y ago
  Way out of my wheelhouse here but maybe something like emitter-coupled logic that was used in the Cray-1 of similar vintage? Power hungry but allowed the Cray-1 to hit 80 MHz in 1975.
- blihp 4y ago
  Wasn't ECL in use for high speed logic around that time? I assume if the parent was at MIT they would have had access to all the cool toys back then.
- peter303 4y ago
  You may be right. Somehow 6 ns stuck in my memory, while internet lookup said the 7400 series was 10 ns. I just recall you had to slow down everything considerably to make it human-viewable.
  - deleted 4y ago
    [deleted]
todd8 4y ago
At MIT in 1973 I had to use RTL logic (lower density, speed, and fan-out than TTL) for my digital design lab. I decided to design a circuit that played perfect Nim on a board of one to four piles of up to 15 stones in each pile. It took around 20 JK Flip-flops to manage the game state and do the calculations plus more latches and muxes and demuxes for I/O. My biggest problem was that I hadn’t yet learned to pick minimum viable projects that would still result in a good grade.

codedokode 4y ago

What logic family did you use? Standard 74-series TTL chips that existed in 1975 are unlikely to work at 166Mhz, their propagation delay was around 20 ns.

snek_case 4y ago
The 1 kbit RAM chip probably also would have difficulty running at 166MHz. That being said, having the master clock of the system running at 166MHz doesn't mean the entire thing does. You could use a high clock rate to generate a video signal but have the actual logic of the system behind a clock divider running at a much lower frequency.
- dahart 4y ago
  My hardware design prof in undergrad had a story about one of the chip manufacturers having some cray fast internal clock in the 70s or 80s that was running microcode to implement the processor’s ISA. In my (probably faulty) memory I think the story was something like 800 MHz made by a weird brand (weird to my naive undergrad brain) like Rockwell or something, while the instruction clock presented to the user was maybe in the single or double digit MHz. No idea if I’m remembering right, and my Google Fu is failing to verify this story. But anyway, to your point, modern GPUs have a bunch of different clocks for different sub-systems.
loser777 4y ago
Way out of my wheelhouse here but maybe something like emitter-coupled logic that was used in the Cray-1 of similar vintage? Power hungry but allowed the Cray-1 to hit 80 MHz in 1975.
blihp 4y ago
Wasn't ECL in use for high speed logic around that time? I assume if the parent was at MIT they would have had access to all the cool toys back then.
peter303 4y ago
You may be right. Somehow 6 ns stuck in my memory, while internet lookup said the 7400 series was 10 ns. I just recall you had to slow down everything considerably to make it human-viewable.
- deleted 4y ago
  [deleted]

todd8 4y ago

At MIT in 1973 I had to use RTL logic (lower density, speed, and fan-out than TTL) for my digital design lab. I decided to design a circuit that played perfect Nim on a board of one to four piles of up to 15 stones in each pile. It took around 20 JK Flip-flops to manage the game state and do the calculations plus more latches and muxes and demuxes for I/O. My biggest problem was that I hadn’t yet learned to pick minimum viable projects that would still result in a good grade.