2 ms·
> But scatter/gather is a primitive operation for SIMD Not in NEON, and therefore not in M1. AVX512 and SVE add scatter/gather instructions. Intel/AMD's AVX h
by dragontamer 4y ago
> But scatter/gather is a primitive operation for SIMD
Not in NEON, and therefore not in M1. AVX512 and SVE add scatter/gather instructions.
Intel/AMD's AVX has vgather instructions, but is missing vscatter until AVX512.
> Having dedicated instructions for specific operations (whether for crc/aes/nnp or whatever) feels like a CISC-based approach, so I think I agree with the GP.
Not only are there AES instructions on ARM, but there's also SHA-instructions. The mix-columns step of AES more or less demands dedicated hardware if you want high-speed today, so everybody implements that as a hardware specific instruction.