> What people need to realize is that a P cores takes around 4 times the die area/transistors of an E core, and use probably 3 to 4 times the power of an E core

> What people need to realize is that a P cores takes around 4 times the die area/transistors of an E core, and use probably 3 to 4 times the power of an E core, but performance is only around double that of an E core... (Btw, these ratios are pretty similar as those for the Firestorm/Icestorm cores in Apple's M1.) Apple's strategy with their in house chips has always involved optimizing for performance and power draw, and not so much for die area. They throw execution hardware at the problem and run the clocks slower for power efficiency. For instance, going back to the 2012 A5x: >the A5X is approximately 2x the size of NVIDIA's Tegra 3, and even larger than a dual-core Sandy Bridge desktop CPU While it's technically possible for Apple to have ramped up CPU clocks in pursuit of higher performance, Apple has traditionally been very conservative on CPU clock frequency. Higher clocks require higher voltages (especially on the same process node), which result in an exponential increase in power consumption. https://www.anandtech.com/show/5688/apple-ipad-2012-review/11 https://www.anandtech.com/show/5688/apple-ipad-2012-review/1... Caring less about die area makes sense when you are selling the whole widget and not just the chip itself.