It’s not just DRM; It’s about being homogeneous. If a process is on an E core and checks CPUID to see that AVX-512 isn’t available, it won’t execute those instr

It’s not just DRM; It’s about being homogeneous. If a process is on an E core and checks CPUID to see that AVX-512 isn’t available, it won’t execute those instructions even if AVX-512 was supported on a P core. As Agner said: > It is completely unrealistic that an application program can handle this situation in a reasonable manner and optimally allocate different threads to the different cores. A suggestion I saw here a lot was “pretend to support it, but detect attempts to use the instructions and pin the task to the P cores.” This would have issues with libraries like libc that would attempt to vectorize themselves and end up forcing an E core appropriate process onto a P core.