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The Apple GPU and the impossible bug
- deleted 4y ago[deleted]
- stefan_ 4y ago> The Tiled Vertex Buffer is the Parameter Buffer. PB is the PowerVR name, TVB is the public Apple name, and PB is still an internal Apple name. Patent lawyers love this one silly trick.
- robert_foss 4y agoSeeing how Apple licensed the full PowerVR hardware before, they probably currently have a license for the whatever hardware they based their design on.
- brian_herman 4y agoAlso laywers that can keep it in court long enough for a redesign.
- pyb 4y agoApple's claim is that they designed it themselves. https://en.wikipedia.org/wiki/Talk:Apple_M1#[dubious_%E2%80%93_discuss]_GPU_Design https://en.wikipedia.org/wiki/Talk:Apple_M1#[dubious_%E2%80%...
- gjsman-1000 4y agoThere's no reason that couldn't be a half-truth - it could be a PowerVR with certain components replaced, or even the entire GPU replaced but with PowerVR-like commands and structure for compatibility reasons. Kind of like how AMD designed their own x86 chip despite it being x86 (Intel's architecture). Also, if you read Hector Martin's tweets (he's doing the reverse-engineering), Apple replacing the actual logic while maintaining the "API" of sorts is not unheard of. It's what they do with ARM themselves - using their own ARM designs instead of the stock Cortex ones while maintaining ARM compatibility.* *Thus, Apple has a right to the name "Apple Silicon" because the chip is designed by Apple, and just happens to be ARM-compatible. Other chips from almost everyone else use stock ARM designs from ARM themselves. Otherwise, we might as well call AMD an "Intel design" because its x86 by the same logic.
- pyb 4y agoI haven't followed the announcements CPU side - do Apple clearly claim that they designed their own CPU (with an ARM instruction set)?
- daneel_w 4y agoThey are one of a handful of companies that hold a license allowing them to both customize the reference core and to implement the Arm ISA through their own silicon design. Everyone else's SoCs all use the same Arm reference mask. Qualcomm also holds such a license, which owes to their Snapdragon SoC, just like Apple's A- and M-series, occupying a performance hierarchy above everything else Arm.
- pyb 4y agoSuch a license is a big clue, but not quite what I was enquiring about...
- gjsman-1000 4y agoQualcomm did use their own design called Kyro for a little while, but is now focusing on cores designed by Nuvia which they just bought for the future. As for Apple, they've designed their own cores since the Apple A6 which used the Swift core. If you go to the Wikipedia page, you can actually see the names of their core designs, which they improve every year. For the M1 and A14, they use Firestorm High-Performance Cores and Icestorm Efficiency Cores. The A15 uses Avalanche and Blizzard. If you visit AnandTech, they have deep-dives on the technical details of many of Apple's core designs and how they differ from other core designs including stock ARM. The Apple A5 and earlier were stock ARM cores, the last one they used being Cortex A9. For this reason, Apple is about as much an ARM chip as AMD is an Intel chip. Technically compatible, implementation almost completely different. It's also why Apple calls it "Apple Silicon" and it is not just marketing, but actually justified just as much as AMD not calling their chips Intel derivatives.
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- kimixa 4y agoThey originally claimed they completely redesigned it and announced they were therefore going to drop the PowerVR architecture license - that was the reason for the stock price crash and Imagination Technologies sale in 2017. Then they have since scrubbed the internet of all such claims and to this day pay for an architecture license. I think it's similar to an ARM architecture license - where it's a license for any derived technology and patents rather than actually being given the RTL for powervr-designed cores. I worked at PowerVR during that time (I have Opinions, but will try to keep them to myself), and my understanding was that Apple hadn't actually taken new PowerVR RTL for a number of years and had significant internal redesigns of large units (e.g. the shader ISA was rather different from the PowerVR designs of the time), but presumably they still use enough of the derived tech and ideas that paying the architecture license is necessary. This transfer was only one way - we never saw anything internal about Apple's designs, so reverse engineering efforts like this are still interesting. And as someone who worked on the PowerVR cores (not the Apple derivatives) I can assure you all this discussed in the original post is extremely familiar.
- girvo 4y agoWhile I can understand why you might not want to in a public forum, I know I’d personally love to hear your Opinions on the matter!
- kimixa 4y agoIt's a small enough group that I'm likely personally identifiable anyway, so will be vague and try to stick to public info and my personal conjecture. Let's just say that the legal shenanigans of the time caused me to lose my job (part of the sale of Imagination Technologies required closing some countries offices to avoid more interference from various regulatory bodies). Judge bias accordingly. And all their noise about "Ground up redesign using no PowerVR tech" kinda conflicts with them still to this day paying for an architecture license - the very thing that they claimed they would be dropping in their press release that caused the imagination technologies share crash and corresponding sale. And this is without even going to court - they issued a press release then immediately relented (and have continued to relent for over 5 years now) at the slightest question. And then scrubbed all mention of that press release. My general suspicion is apple intended to game the market by intentionally dropping the share price and simply purchase PowerVR at a discount - but in the process pissed off enough people that they rejected the offer, even if it was "better" in terms of value. Or just let them go under and pick everything they want off the resulting fire sale - I heard rumors that apple had already put in an offer to purchase the company that was rejected, and under UK regulation a failed takeover attempt can't be re-attempted for some time, that much of this happened within (again, according to fuzzy scuttlebutt, nothing definite) That or the legal/C-suite of apple don't actually speak to the engineers of apple anymore - they honestly thought that it was a completely ground-up design that didn't derive anything from PowerVR tech, and just send out the press release thinking "Why are we paying for this??" - then the engineers shuffled in saying that actually they couldn't put together anything better that wasn't a direct derivative, and their noise about a completely internally designed-from-scratch apple GPU was a bit of a stretch.
- VyseofArcadia 4y ago> Yes, AGX is a mobile GPU, designed for the iPhone. The M1 is a screaming fast desktop, but its unified memory and tiler GPU have roots in mobile phones. PowerVR has its roots in a desktop video card with somewhat limited release and impact. It really took off when it was used in the Sega Dreamcast home console and the Sega Naomi arcade board. It was only later that people put them in phones.
- robert_foss 4y agoBut being a Tiling rendering architecture which is normal for mobile applications and not how desktop GPUs are architectured, it would be fair to call it a mobile GPU.
- Veliladon 4y agoNvidia appears to be an immediate mode renderer to the user but has used a tiled rendering architecture under the hood since Maxwell.
- pushrax 4y agoAccording to the sources I've read, it uses a tiled rasterizing architecture but it's not deferred in the same way as typical mobile TBDR that bins all vertexes before starting rasterization, deferring all rasterization after all vertex generation, and flushing each tile to the framebuffer once. NV seems to rasterize vertexes in small batches (i.e. immediately) but buffers the rasterizer output on die in tiles. There can still be significant overlap between vertex generation and rasterization. Those tiles are flushed to the framebuffer, potentially before they are fully rendered, and potentially multiple times per draw call depending on the vertex ordering. They do some primitive reordering to try to avoid flushing as much, but it's not a full deferred architecture.
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- monocasa 4y ago
- thanatos519 4y agoWhat an entertaining story!
- sh33sh 4y agoReally enjoyed the way it was written
- GeekyBear 4y agoAlyssa's writing style steps you through a technical mystery in a way that remains compelling even if you lack the domain knowledge to solve the mystery yourself.
- nicoburns 4y ago> Why the duplication? I have not yet observed Metal using different programs for each. I'm guessing whoever designed the system wasn't sure whether they would ever need to be different, and designed it so that they could be. It turned out that they didn't need to be, but it was either more work than it was worth to change it (considering that simply passing the same parameter twice is trivial), or they wanted to leave the flexibility in the system in case it's needed in future. I've definitely had APIs like this in a few places in my code before.
- pocak 4y agoI don't understand why the programs are the same. The partial render store program has to write out both the color and the depth buffer, while the final render store should only write out color and throw away depth.
- hansihe 4y agoNot necessarily, other render passes could need the depth data later.
- Someone 4y agoSo it seems it allows for optimization. If you know you don’t need everything, one of the steps can do less than the other.
- johntb86 4y agoMost likely that would depend on what storeAction is set to: https://developer.apple.com/documentation/metal/mtlrenderpassattachmentdescriptor/1437956-storeaction https://developer.apple.com/documentation/metal/mtlrenderpas...
- pocak 4y agoRight, I had the article's bunny test program on my mind, which looks like it has only one pass. In OpenGL, the driver would have to scan the following commands to see if it can discard the depth data. If it doesn't see the depth buffer get cleared, it has to be conservative and save the data. I assume mobile GPU drivers in general do make the effort to do this optimization, as the bandwidth savings are significant. In Vulkan, the application explicitly specifies which attachment (i.e. stencil, depth, color buffer) must be persisted at the end of a render pass, and which need not. So that maps nicely to the "final render flush program". The quote is about Metal, though, which I'm not familiar with, but a sibling comment points out it's similar to Vulkan in this aspect. So that leaves me wondering: did Rosenzweig happen to only try Metal apps that always use MTLStoreAction.store in passes that overflow the TVB, or is the Metal driver skipping a useful optimization, or neither? E.g. because the hardware has another control for this?
- Jasper_ 4y agoHuh, I always thought tilers re-ran their vertex shaders multiple times -- once with position-only to do binning, and then again when computing for all attributes with each tile; that's what the "forward tilers" like Adreno/Mali do. That's crazy they dump all geometry to main memory rather than keeping it in pipe. It explains why geometry is more of a limit on AGX/PVR than Adreno/Mali.
- atq2119 4y agoI was under that impression as well. If they write out all attributes, what is really the remaining difference to a traditional immediate more renderer? Nvidia reportedly has vertex attributes going through memory for many generations already (and they are at least partially tiled...). I suppose the difference is whether the render target lives in the "SM" and is explicitly loaded and flushed (by a shader, no less!) or whether it lives in a separate hardware block that acts as a cache.
- Jasper_ 4y agoNV has vertex attributes "in-pipe" (hence mesh shaders), and the appearance of a tiler is a misread, it's just a change to the macro-rasterizer about which quads get dispatched first, it's not a true tiler. The big difference is the end of the pipe, as mentioned; whether you have ROPs or whether your shader cores load/store from a framebuffer segment. Basically, whether or not framebuffer clears are expensive (assuming no fast-clear cheats), or free.
- pocak 4y agoThat's what I thought, too, until I saw ARM's Hot Chips 2016 slides. Page 24 shows that they write transformed positions to RAM, and later write varyings to RAM. That's for Bifrost, but it's implied Midgard is the same, except it doesn't filter out vertices from culled primitives. That makes me wonder whether the other GPUs with position-only shading - Intel and Adreno - do the same. As for PowerVR, I've never seen them described as position-only shaders - I think they've always done full vertex processing upfront. edit: slides are at https://old.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.22-Monday-Epub/HC28.22.10-GPU-HPC-Epub/HC28.22.110-Bifrost-JemDavies-ARM-v04-9.pdf https://old.hotchips.org/wp-content/uploads/hc_archives/hc28...
- tambourine_man 4y agoFew things are more enjoyable than reading a good bug story, even when it's not one's area of expertise. Well done.
- alimov 4y agoI had the same thought. I really enjoy following along and getting a glimpse into the thought process of people working through challenges.
- quux 4y agoImpressive work and really interesting write up. Thanks!
- 542458 4y agoIt's been said more than a few times in the past, but I cannot get over just how smart and motivated Alyssa Rosenzweig is - she's currently an undergraduate university student, and was leading the Panfrost project when she was still in high school! Every time I read something she wrote I'm astounded at how competent and eloquent she is.
- azinman2 4y agoDoes anyone know if she has a proper interview somewhere? I'd love to know how she got so technical in high school to be able to reverse engineer a GPU -- something I would have no idea how to start even with many more years experience (although admittedly I know very little about GPUs and don't do graphics work).
- frostwarrior 4y agoWhile I was reading I was already thinking that. I can't believe how smart and an awesome developer she is.
- pciexpgpu 4y agoUndergrad? I thought she was some Staff SWE in an OSS company. Seriously impressive, and ought to give anyone imposter syndrome.
- gjsman-1000 4y agoWell, Alyssa is, and works for Collabora while also being undergrad.
- coverband 4y agoI was about to post "very impressive", but that seems a huge understatement after finding out she's still in school...
- aero-glide2 4y agoHave to admit, wherever i see people much younger than me do great things I get very depressed.
- bob1029 4y agoI really appreciate the writing and work that was done here. It is amazing to me how complicated these systems have become. I am looking over the source for the single triangle demo. Most of this is just about getting information from point A to point B in memory. Over 500 lines worth of GPU protocol overhead... Granted, this is a one-time cost once you get it working, but it's still a lot to think about and manage over time. I've written software rasterizers that fit neatly within 200 lines and provide very flexible pixel shading techniques. Certainly not capable of running a cyberpunk 2077 scene, but interactive framerates otherwise. In the good case, I can go from a dead stop to final frame buffer in <5 milliseconds. Can you even get the GPU to wake up in that amount of time?
- mef 4y agowith great optimization comes great complexity
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- ip26 4y agoIs it just optimization? I would call it capability. An automobile is more complicated to operate than a skateboard.
- jfim 4y ago> In the good case, I can go from a dead stop to final frame buffer in <5 milliseconds. Can you even get the GPU to wake up in that amount of time? Considering the fact that there are 240 Hz monitors nowadays, which means that an entire frame must be rendered in about 4ms, it has to be possible.
- plekter 4y agoModern gpus + drover stack usually had more than one frame in flight. You have to output a frame every 4ms, but you do not need the latency from the start of the application rendering code to the frame being on screen to be 4ms - pipelining is allowed. But keeping that pipelining down to a minimum is also important, as it contributes to input lag which gamers care about.
- dry_soup 4y agoVery interesting and easy to follow writeup, even for a graphics ignoramus like myself.
- ninju 4y ago> Comparing a trace from our driver to a trace from Metal, looking for any relevant difference, we eventually stumble on the configuration required to make depth buffer flushes work. > And with that, we get our bunny. So what was the configuration that needed to change? Don't leave us hanging!!!
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- lukasb 4y agoCan you imagine if you had her problem and found her post, and then realized she'd omitted that detail? (Yes she tells you how to figure it out yourself)
- daenz 4y agoThat image gave me flashbacks of gnarly shader debugging I did once. IIRC, I was dividing by zero in some very rare branch of a fragment shader, and it caused those black tiles to flicker in and out of existence. Excruciatingly painful to debug on a GPU.
- paulmd 4y agodebugging in situations where there is no ability to halt and step, or in some cases even log, is extremely extremely tricky. Embedded is another domain where that's super common... or drivers or other peripherals. there probably are tools these days for debugging shaders, potentially commercial packages if Nsight Studio doesn't have it, but yeah, that sort of thing isn't easy.
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- danw1979 4y agoAlyssa and the rest of the Asahi team are basically magicians as far as I can tell. What amazing work and great writing that takes an absolute graphics layman (me) on a very technical journey yet it is still largely understandable.
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- aosmith 4y agoThis is present in a lot of unreal engine games running on mac os x too. Tomb Raider is a great example.