4 ms·
Even 0.1ns is way slow. A modern silicon cmos gate will switch under 10ps, which is how we can fit 25+ gates in a single cycle at >3GHz. Everyone should remembe
by universal_sinc 4y ago
Even 0.1ns is way slow. A modern silicon cmos gate will switch under 10ps, which is how we can fit 25+ gates in a single cycle at >3GHz. Everyone should remember that cpu frequency is not the same as the frequency a single gate can switch. Also keep in mind we are mostly wire limited anyway, as resistivity of copper at <50nm line widths is quite unlike its bulk resistivity, and scales super-linearly. This prevents us from further shrinking wires at all.
- kardos 4y ago> resistivity of copper Could we use a superconductor here instead of copper in order to achieve further wire shrinkage? Eg, if it were to be operated in a datacentre where it's plausible to power the cooler needed to keep it cold. The amount of superconducting material would be quite small
- picture 4y agoMicrofabrication is quite an art. Being able to image pieces of copper down to such ludicrously small sizes with techniques like EUV and optical proximity correction is already quite advanced. Doing it for high temperature superconductors like YBCO is definitely not trivial. I don't think superconductors are a good idea due to the reduced fidelity, you might as well just use normal conductors and spread them out for better cooling
- MichaelZuo 4y agoWhat about silver instead of copper?
- trsohmers 4y agoSilver’s electromigration is significantly worse than copper, leading to reduced reliability. Plus the fact that silver is ~200x more expensive doesn’t help.