Is this[1] the best resource for understanding TPU (or TPU-like) architectures in general? I would love to see a TPU implementation in the style of the Nand2Te

Is this[1] the best resource for understanding TPU (or TPU-like) architectures in general? I would love to see a TPU implementation in the style of the Nand2Tetris[2] CPU, reduced to its bare essentials for learning purposes. Are systolic array processors the best place to start for this kind of info? Thanks in advance if anyone answers. :) [1]: https://drive.google.com/file/d/0Bx4hafXDDq2EMzRNcy1vSUxtcEk/view?resourcekey=0-ulCsvFTNky29UIPJ3pHyCw https://drive.google.com/file/d/0Bx4hafXDDq2EMzRNcy1vSUxtcEk... [2]: https://www.nand2tetris.org/course https://www.nand2tetris.org/course