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Redrawing designs yourself is indeed commonplace in the electronics industry, but coming from the software world it's always struck me as a mix of weak tooling
by michaelt 5y ago
Redrawing designs yourself is indeed commonplace in the electronics industry, but coming from the software world it's always struck me as a mix of weak tooling and outdated conventions, rather than something inherent to the industry.
After all, why shouldn't a reference design be defined in a parametric way? Your switch-mode power supply might need a class-X value-Y precision-Z voltage-A ESR-B at frequency-C capacitor, while my decoupling capacitor just needs to be >3.3v 100nF and doesn't mind if you use one 5x larger.
Personally I've made innumerable designs where, at the schematic stage, I've copy-pasted a microcontroller and a crystal and capacitors and programming header and reset pull-up. It's a common-sense way to avoid human error, and a time saver too.
The design reuse is happening - the tools just haven't caught up.
- eupfhoria 5y ago
- techdragon 5y agoThe tools have had over ten years (if not twenty) of a growing maker movement bringing new people without training in EDA tools who would benefit from this kind of reuse… and it hasn’t caught up. There seems to be a perception that you should be able to do these basic things, like copying a circuit design into your EDA tool, and understanding which basic components to pick like all the little capacitors and pull up/down resistors. This perception prevents people from viewing it as a worthwhile feature.
- DHaldane 5y agoYou're right - reference designs should be parametric. Everybody wants this including the semiconductor companies. Seems like the failure in the tools is that parametric generation is really badly supported by the usual graphics-oriented approach.