One of the issues with this type of thing is that each fab has slightly different ways of taking the HDL and converting to their process. These come in the form

One of the issues with this type of thing is that each fab has slightly different ways of taking the HDL and converting to their process. These come in the form of a PDK and each fab and process will have their own development kits. The threat they are trying to deal with is a fab modifying the silicon and introducing additional logic during production. The issue that I see is the most likely place that behavior would be inserted is inside the PDK, so even if you can compare what it should output vs what’s produced, it would match. The other issue is even if you compare something that generates the exact same transistors… if you produce at Fab A and Fab B, the silicon is going to be different.