Open source implementation tools certainly have a long way to go but they're already capable of doing some good stuff. E.g. check out symbiflow/f4pga (https://g

Open source implementation tools certainly have a long way to go but they're already capable of doing some good stuff. E.g. check out symbiflow/f4pga (https://github.com/SymbiFlow https://github.com/SymbiFlow, https://f4pga.org/ https://f4pga.org/). You can build significant FPGA designs for the modern Xilinx Artix 7 FPGAs with entirely open source tooling. Efabless are doing multiple shuttle runs that use an open PDK (Skywater 130nm) and open implementation tools (https://efabless.com/open_shuttle_program https://efabless.com/open_shuttle_program). Very primitive compared to a cadenece or synopsys tool suite producing designs for a leading edge node, but still capable of producing a real chip that can be used in real applications. Implementation tools are very complex and the costs for messing up a design are very high, so they're not going to be the first things open source tooling might displace. I think you'll also see them mature far quicker in the FPGA world as you can always switch back to the vendor tools if the open flow isn't working for you (where with silicon you might not discover the open flow has messed up your tape-out until it's too late). Plus it's a lot easier to developers to iterate and improve the tools (you need an FPGA board, $500 will get you something with decent capabilities, a slight risk you'll destroy it when experimenting, far cheaper than having to do multiple ASIC tape-outs to test your results). Also worth noting Xilinx have joined the f4pga working group and I know Lattice look favorably upon open source FPGA tool chains. Once open source flows mature in FPGA land I can see them dominating (contrast against compiler technology, once upon a time you'd be buying a commercial compiler, now whilst commercial compilers still exist GCC and LLVM are your best option in many cases). Then when proved in FPGA interest in open source ASIC implementation will hopefully rise and you will see open ASIC flows mature also.