> That’s what Apple explicitly says. Why they don’t match with measurements is another matter… (and no, it’s not a typo) Ridiculous. You're just making things

> That’s what Apple explicitly says. Why they don’t match with measurements is another matter… (and no, it’s not a typo) Ridiculous. You're just making things up. It clearly doesn't have a 160kB 6-way L1 dcache. Nor are the small cores 64kB 6-way -- those don't even divide that's ridiculous. Why do you say it's not a typo? They "explicitly" say it is 160kB in that backwater code comment. They also explicitly say it's 128kB in this presentation https://www.youtube.com/watch?v=5AwdkGKmZ0I&t=534s https://www.youtube.com/watch?v=5AwdkGKmZ0I&t=534s so what makes your source the authoritative one?? Pretty obviously it's a quick cut and paste job with a typo (two in one line actually) in it. > ECC? Needs hugepages? Or hardware erratum? I don’t know for sure. ECC? Erratum? Come on. It's clearly because it's 128kB.