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As a former microarchitect, the contortions designs take on is due to a combination of factors, usually stemming from routing/timing problems in the design or b
by gotaquestion 4y ago
As a former microarchitect, the contortions designs take on is due to a combination of factors, usually stemming from routing/timing problems in the design or backwards compatibility, and every now and then, compiler team requests.
For example, endian-ness looks like weirdness to a programmer, but not to a chip designer that needs to read in lower-order bytes first to decode an instruction quickly. Why not just change the instruction decoder? Because it needs to be backwards compatible to what was once a byte-sized ISA.
But for programmers who don't understand the history, it seems insane.
- Annatar 4y agoThat's because it is insane: how come most processors are big endian, how did they manage just fine?
- gotaquestion 4y agoFirst off, most processors are not BE. Arm and X86 are LE and cover "most processors". Second, processors like the Motorola 68000 were 32-bit, so there was no need to read just the first byte. Refer to my point about instruction fetch. Like I said, if you have an ISA that came from byte-sized opcodes, and then expanded later, you need to fetch bytes first. However, if your opcodes are 32-bit, then the code is bigger. (In the old days, CISC code size was a selling point compared to RISC, this opcode compression was one of the reasons.) This is what you learn in first-year computer architecture. However the world has changed a lot since the 80's. Single bytes aren't fetched in x86, 256-byte cachelines are, and the decode happens on that.
- Annatar 4y agoARM and x86 are only two out of many processors: you are purposely choosing to confuse market dominance with what exists, and I fault you for it, because by behaving in this way, you are helping perpetuate the monoculture. The moment you help perpetuate a monoculture rather than subvert it and fight it at every turn and opportunity, you become part of the problem.