True. Another reason to avoid too much aligning is to help reduce reliance on N-way cache collision avoidance. Caches on modern chips can handle keeping up to

True. Another reason to avoid too much aligning is to help reduce reliance on N-way cache collision avoidance. Caches on modern chips can handle keeping up to some small fixed number, often 4, objects all in cache whose addresses are at the same offset into a page, but performance may collapse if that number is exceeded. It is quite hard to tune to avoid this, but by making things not line up on power-of-two boundaries, we can avoid out-and-out inviting it.