3 ms·

Some useful notes... Designing switched mode supplies is hard. I've just barely started playing with them, but it's really tough choosing component values that

Some useful notes... Designing switched mode supplies is hard. I've just barely started playing with them, but it's really tough choosing component values that don't ring like a bell, a loud bell, at pretty high frequencies. I've found these two series of web pages [0] [1] to be very useful, even for an electronics neophyte such as myself. Also, for simulations Xyce [2] handles the large current transients much better than Ngspice [3] (the default simulator for KiCad), and the Xyce docs gave me some really good guidance on how to tweak the settings. One trick I stumbled on was to run the input voltage as high as feasable; for the part I'm trying to use the source/drain effective source/drain capacitance drops dramatically as the voltage goes up. It's the MOSFET capacitances that are causing me the most grief. And testing for EMI seems to be a black art. Hack-a-Day has listed some do-it-yourself projects for probes and testing ([4] [5] ...), but haven't gotten that far yet. [edit.. toned down a little] [0] https://www.powerelectronicsnews.com/the-dc-dc-boost-converter-power-supply-design-tutorial-section-5-1/ https://www.powerelectronicsnews.com/the-dc-dc-boost-convert... [1] http://tuks.nl/Mirror/SwitchModePowerSupply_smpstech_com/map.htm http://tuks.nl/Mirror/SwitchModePowerSupply_smpstech_com/map... [2] https://xyce.sandia.gov/ https://xyce.sandia.gov/ [3] http://ngspice.sourceforge.net/ http://ngspice.sourceforge.net/ [4] https://hackaday.com/2014/03/18/listening-to-electromagnetic-interference-with-a-rtlsdr-dongle/#more-117539 https://hackaday.com/2014/03/18/listening-to-electromagnetic... [5] https://hackaday.com/2021/05/21/simple-probe-sniffs-out-emi/ https://hackaday.com/2021/05/21/simple-probe-sniffs-out-emi/

exmadscientist 5y ago
>it's really tough choosing component values that don't ring like a bell, a loud bell, at pretty high frequencies That doesn't sound right to me. It's not really about the component values. It's about the parasitics and the edge rates that can ring those parasitics. The main LC elements are not usually the problem (especially at high frequencies). > for simulations You cannot simulate any SMPS for EMC reasons without including the layout. Full stop, do not pass Go, etc. You can simulate for functionality and you can avoid some well-known traps, but you'll never be able to be confident without the layout included. Never. > run the input voltage as high as feasable Usually you want your duty cycle around 50%. Higher input voltages will push that down, which is usually a bad thing and requires special measures to compensate. And switch capacitances are rarely a major problem below line voltages, so you don't get much return on it either. What, exactly, are you trying to do? (Disclaimer: professional EE but not a power guy. I do little SMPS stuff up to 24V all the time though, especially low-noise analog supplies.)
- mgsouth 5y ago
  I'm just getting into analog electronics. Nominally, I'm trying to synthesize 90VAC @ 30mA (telephone ring signal) using buck/boost from a "reasonable" input voltage with reasonable efficiency. Not anywhere close to worrying about interference, but seeing simulated 3A swings at 1MHz is not encouraging... A big chunk of that is due to gate/src & src/drain capacitance. I'm finding that jacking up the inductance leads to really high average currents, cutting the inductance means really small damping resistors and high current again, shrinking the output capacitance helps the ringing and quickly gets the voltage where I need it, but now the ripple is horrible... fun times!

exmadscientist 5y ago

>it's really tough choosing component values that don't ring like a bell, a loud bell, at pretty high frequencies That doesn't sound right to me. It's not really about the component values. It's about the parasitics and the edge rates that can ring those parasitics. The main LC elements are not usually the problem (especially at high frequencies). > for simulations You cannot simulate any SMPS for EMC reasons without including the layout. Full stop, do not pass Go, etc. You can simulate for functionality and you can avoid some well-known traps, but you'll never be able to be confident without the layout included. Never. > run the input voltage as high as feasable Usually you want your duty cycle around 50%. Higher input voltages will push that down, which is usually a bad thing and requires special measures to compensate. And switch capacitances are rarely a major problem below line voltages, so you don't get much return on it either. What, exactly, are you trying to do? (Disclaimer: professional EE but not a power guy. I do little SMPS stuff up to 24V all the time though, especially low-noise analog supplies.)

mgsouth 5y ago
I'm just getting into analog electronics. Nominally, I'm trying to synthesize 90VAC @ 30mA (telephone ring signal) using buck/boost from a "reasonable" input voltage with reasonable efficiency. Not anywhere close to worrying about interference, but seeing simulated 3A swings at 1MHz is not encouraging... A big chunk of that is due to gate/src & src/drain capacitance. I'm finding that jacking up the inductance leads to really high average currents, cutting the inductance means really small damping resistors and high current again, shrinking the output capacitance helps the ringing and quickly gets the voltage where I need it, but now the ripple is horrible... fun times!