3 ms·

We really need some X86 stuff to come out on that 5nm process already. Everyone keeps saying that the M1 chips are great, and they are right, but then they slip

by pkulak 5y ago

We really need some X86 stuff to come out on that 5nm process already. Everyone keeps saying that the M1 chips are great, and they are right, but then they slip into implying it's because of the ARM design, which I don't think there's any evidence for. Yet. When AMD's Zen 4 stuff comes out we'll finally be able to compare architectures, and I can't wait.

philistine 5y ago
There's plenty of evidence, and the 5nm architecture is far from the only part of the story. Would an x86 on 5nm suddenly be able to run without a fan?
- pkulak 5y ago
  My 2017 Pixelbook has no fan and it's 14nm x86. So yes. Feed a processor 10 watts and it can run fanless.
  - philistine 5y ago
    But at what cost? https://www.cpubenchmark.net/compare/Intel-i7-7Y75-vs-Apple-M1-8-Core-3200-MHz/2880vs4104 https://www.cpubenchmark.net/compare/Intel-i7-7Y75-vs-Apple-...
    - jotm 5y ago
      Well, no, this is what you want to compare (15W, latest generation): https://www.cpubenchmark.net/cpu.php?cpu=Intel+Core+i7-1265U&id=4766 https://www.cpubenchmark.net/cpu.php?cpu=Intel+Core+i7-1265U... Though it does use TurboBoost up to 55W apparently. I don't know about the M1. If anyone wants to try, you can lock TDP on some laptops to exactly 15W (or whatever the compared M1 runs at) and run Passmark or something.
temac 5y ago
ARM ISA has probably little to do with the efficiency, although: * the memory model is slightly more relaxed * instruction decoding is obviously simpler, and while the impact of x86 decoding was not that major at a point, I suspect it has increased with time What matters is mostly the microarchitecture of Apple, and, yes, the 5nm. IIRC at the beginning of the Zen projet, AMD wanted to do 2 versions: 1 with an x86 frontend, and one with an ARM one. They would probably have had very similar performance profiles, and I suspect at most a dozen percent of diff for energy consumption. Intel is currently very far from that to reach a core perf similar to the one of the M1.
- ClumsyPilot 5y ago
  > the impact of x86 decoding was not that major at a point, I suspect it has increased with time Can you elaborate why decode would become more problematic over time?
  - vlovich123 5y ago
    if I recall correctly ARM instructions are fixed length. You can start deciding instructions on parallel at the same time (ie right after you fetch). X86 uses variable length instructions. Decoding the next instruction requires the previous one to be decoded (think decompression vs reading fixed records). Hopefully I got that right. Now in theory Intel and AMD do employ tricks to optimize x86 decode. If I recall this correctly, they decide opportunistically several possible paths simultaneously and start speculatively executing the ones that turn out to be valid instructions. Likely this works pretty well (+ the variable length means better utilization of the code cache).
- klelatti 5y ago
  Not disagreeing with your core point on the architectures but there are a few other areas of possible advantage: - No 32 bit support - Fewer other legacy ISA features to support - big.LITTLE style efficiency/ performance cores (until latest generation Intel) On the first two fewer transistors wasted mean more to spend elsewhere (eg on caches).

by pkulak 5y ago

philistine 5y ago

There's plenty of evidence, and the 5nm architecture is far from the only part of the story. Would an x86 on 5nm suddenly be able to run without a fan?

pkulak 5y ago
My 2017 Pixelbook has no fan and it's 14nm x86. So yes. Feed a processor 10 watts and it can run fanless.
- philistine 5y ago
  But at what cost? https://www.cpubenchmark.net/compare/Intel-i7-7Y75-vs-Apple-M1-8-Core-3200-MHz/2880vs4104 https://www.cpubenchmark.net/compare/Intel-i7-7Y75-vs-Apple-...
  - jotm 5y ago
    Well, no, this is what you want to compare (15W, latest generation): https://www.cpubenchmark.net/cpu.php?cpu=Intel+Core+i7-1265U&id=4766 https://www.cpubenchmark.net/cpu.php?cpu=Intel+Core+i7-1265U... Though it does use TurboBoost up to 55W apparently. I don't know about the M1. If anyone wants to try, you can lock TDP on some laptops to exactly 15W (or whatever the compared M1 runs at) and run Passmark or something.

temac 5y ago

ARM ISA has probably little to do with the efficiency, although: * the memory model is slightly more relaxed * instruction decoding is obviously simpler, and while the impact of x86 decoding was not that major at a point, I suspect it has increased with time What matters is mostly the microarchitecture of Apple, and, yes, the 5nm. IIRC at the beginning of the Zen projet, AMD wanted to do 2 versions: 1 with an x86 frontend, and one with an ARM one. They would probably have had very similar performance profiles, and I suspect at most a dozen percent of diff for energy consumption. Intel is currently very far from that to reach a core perf similar to the one of the M1.

ClumsyPilot 5y ago
> the impact of x86 decoding was not that major at a point, I suspect it has increased with time Can you elaborate why decode would become more problematic over time?
- vlovich123 5y ago
  if I recall correctly ARM instructions are fixed length. You can start deciding instructions on parallel at the same time (ie right after you fetch). X86 uses variable length instructions. Decoding the next instruction requires the previous one to be decoded (think decompression vs reading fixed records). Hopefully I got that right. Now in theory Intel and AMD do employ tricks to optimize x86 decode. If I recall this correctly, they decide opportunistically several possible paths simultaneously and start speculatively executing the ones that turn out to be valid instructions. Likely this works pretty well (+ the variable length means better utilization of the code cache).
klelatti 5y ago
Not disagreeing with your core point on the architectures but there are a few other areas of possible advantage: - No 32 bit support - Fewer other legacy ISA features to support - big.LITTLE style efficiency/ performance cores (until latest generation Intel) On the first two fewer transistors wasted mean more to spend elsewhere (eg on caches).