It’s very easy, this kind of testing is crucial for hardware (in a way that it is not for software). At the most basic level this is done through scan, which a

It’s very easy, this kind of testing is crucial for hardware (in a way that it is not for software). At the most basic level this is done through scan, which allows you to test every single wire in the design for several faults (stuck at 0 and stuck at 1 being the most important). This covers the vast majority of failures (for example missing vias and missing contacts). For memory other techniques are needed (reading and writing fixed patterns) and various ‘repairs’ can be done by blowing fuses to translate faulty addresses. So for example you might do scan test (the first one) at the wafer before the dies are even cut, then assume that the majority of dies will have repairable (rather than irreparable) memory errors and only test those after packaging.