They may be making a finer point here, I’m not an expert on packaging, but generally speaking there are packaging processes that support using only “known good

They may be making a finer point here, I’m not an expert on packaging, but generally speaking there are packaging processes that support using only “known good die”. You still have the issue of testing the final integrated product, so the packaging process itself needs to have high yield. For more info check out Dylan Patel’s series on advanced packaging: https://semianalysis.substack.com/p/advanced-packaging-part-1-pad-limited https://semianalysis.substack.com/p/advanced-packaging-part-... https://semianalysis.substack.com/p/advanced-packaging-part-2-review https://semianalysis.substack.com/p/advanced-packaging-part-... https://semianalysis.substack.com/p/advanced-packaging-part-3-intels https://semianalysis.substack.com/p/advanced-packaging-part-... Or this from SemiWiki for a shorter overview of just TSMC processes: https://semiwiki.com/semiconductor-manufacturers/tsmc/290560-highlights-of-the-tsmc-technology-symposium-part-2/ https://semiwiki.com/semiconductor-manufacturers/tsmc/290560...