4 ms·
Can you actually do that with GPIO pins, or would that be too high latency/jitter? Even if so, it seems like a job that would be done much more efficiently by a
by jchw 5y ago
Can you actually do that with GPIO pins, or would that be too high latency/jitter? Even if so, it seems like a job that would be done much more efficiently by an FPGA, though I'd guess the reason why nobody does is because there's probably other stuff tied to the clock that can't run that fast. Or does this already exist? The concept sounds cool.
- ncmncm 5y agoIt popped up on HN pretty recently. A 1 MHz bus is slow enough to operate entirely from the microcontroller's interrupt handler. The native CPU clock pin would be wired directly to the interrupt input to keep it synchronized. One wonderful feature was that it all fit on a circuit board the same size as the original CPU package. As I recall, it had a mode where it would copy all the slow main board RAM contents into the microcontroller RAM, and run extra fast from there, using the bus only for I/O. Seems like it must have a way to designate certain parts of the program to run at cycle-accurate native speed, e.g. to operate the Apple ][ floppy controller. You could of course do it all with an FPGA, but that would seem more like work.
- PaulHoule 5y agoI have seen S100 boards with a rather low performance AVR8 bangs bits on the bus with GPIO.