3 ms·

I can design a CPU that reads the operating system’s clock (easy-peasy) and is actually a time bomb that does something at a predefined time. You could now arg

I can design a CPU that reads the operating system’s clock (easy-peasy) and is actually a time bomb that does something at a predefined time. You could now argue that we can use some workbench that simulates these conditions, but then I will catch you on the fact that you can also determine that random output is changed (statistically for example) for some parameters of the system. Either way enumerating all of these parameters is intractable due to the size of the search space. Same thing goes to the fact that you can’t definitely say whether your CPU will always do what it says it does, purely because you can’t enumerate all possible execute paths as they are infinite.

MichaelBurge 5y ago
> you can’t enumerate all possible execute paths as they are infinite. How do you design a CPU that isn't a finite state machine?
- JohnHaugeland 5y ago
  As soon as you try to tell us which kind of FSM the CPU is, you'll realize why it isn't any of them
  - MichaelBurge 5y ago
    I used to have a friend who worked at AMD, and he said they simulated one of their in-progress CPUs on five Virtex-5 FPGAs. Looking here: https://docs.xilinx.com/v/u/en-US/ds100 https://docs.xilinx.com/v/u/en-US/ds100 * I see a lot of LUTs, adders, and common operations(not a theoretical problem). * There's memory and IO, but that shouldn't matter for defining a single clock tick. * Thermal/power monitoring - not sure how important that is, but sure that's outside the definition of a FSM. I have written simple software and FPGA CPU cores, and I would describe all of them as FSMs. It's possible that newer CPUs wouldn't qualify because e.g. they rely on metastable circuits for randomness, power-monitoring, etc. but most of it should be a FSM and the exceptions aren't anything like "infinite execution paths".

3 ms·

I can design a CPU that reads the operating system’s clock (easy-peasy) and is actually a time bomb that does something at a predefined time. You could now arg

by heavenlyblue 5y ago

MichaelBurge 5y ago
> you can’t enumerate all possible execute paths as they are infinite. How do you design a CPU that isn't a finite state machine?
- JohnHaugeland 5y ago
  As soon as you try to tell us which kind of FSM the CPU is, you'll realize why it isn't any of them
  - MichaelBurge 5y ago
    I used to have a friend who worked at AMD, and he said they simulated one of their in-progress CPUs on five Virtex-5 FPGAs. Looking here: https://docs.xilinx.com/v/u/en-US/ds100 https://docs.xilinx.com/v/u/en-US/ds100 * I see a lot of LUTs, adders, and common operations(not a theoretical problem). * There's memory and IO, but that shouldn't matter for defining a single clock tick. * Thermal/power monitoring - not sure how important that is, but sure that's outside the definition of a FSM. I have written simple software and FPGA CPU cores, and I would describe all of them as FSMs. It's possible that newer CPUs wouldn't qualify because e.g. they rely on metastable circuits for randomness, power-monitoring, etc. but most of it should be a FSM and the exceptions aren't anything like "infinite execution paths".