4 ms·
Not what I was expecting from the article. I don't see how new ISA features could be net positive here. Pointer tagging works fine on x86 already. Low ones fro
by JonChesterfield 5y ago
Not what I was expecting from the article. I don't see how new ISA features could be net positive here.
Pointer tagging works fine on x86 already. Low ones from alignment and high 16 bits provided one does the masking/shifting to get back to canonical form before dereferencing. High 8 if paranoid about future address space increase.
- saagarjha 5y agoAre you familiar with what the ISA feature does? It lets code skip the masking step, allowing them to dereference a non-canonical tagged address as if it was masked into canonical form. Since applications that rely on tagging are typically performance-sensitive, skipping that step can be a win for them.
- JonChesterfield 5y agoI see that benefit. For code compiled appropriately. The article also thinks this will need to be per-process, so context switching gets even more expensive. Maybe the mask gets in the way of prefetching the pointer destination, though the machine might speculate that the pointer will be in canonical form. The arithmetic mask itself is very close to free. I guess someone thinks it's worth the silicon and software dev necessary to deploy. If it makes my code faster then I'll probably use it.
- saagarjha 5y agoIt's one less instruction, so it also reduces code size.