3 ms·

What would make this extra useful is if they could add an instructions that read the tag portion of the pointer (instead of needing to do a shift). The ucode co

• adrian_b 5y ago
  The tag is in the high byte (always for AMD and also for Intel in the 57-bit mode). Instead of a shift and a mask, on Intel/AMD CPUs you can use the instruction BSWAP (to move the highest byte into the lowest byte) and then you may access the register as a byte (even if usually it does not matter what size you use to access the register, because in most cases you just test individual tag bits). Moreover, on any Atom CPUs or any other CPUs newer than Haswell (2013), you may skip the BSWAP by loading the pointer with a MOVBE instruction, which does the byte swapping during the load. This use of BSWAP/MOVBE is identical to the handling of big-endian (a.k.a. network byte order) data, like in the headers of network data packets. Because of that, they are already available in C/C++ in macros that depend on the operating system, e.g. __be64_to_cpu(x) for Linux, which can be used in C/C++ to access the pointer tag. No new instruction could be more compact than the old BSWAP or MOVBE instructions, so there is absolutely no need for a new special instruction. For Intel in 48-bit address mode, the same BSWAP or MOVBE will bring the tag into the 16-bit part of a register. You just need to take care that the 2 bytes of the tag are swapped. This does not matter, because you should define the structure that corresponds to the tag to match the layout that results after loading the byte-swapped pointer.