3 ms·
> Older CPUs - the CPU had a bunch of A pins (address), a bunch of D pins (data). And on some buses, some or all A/D pins where multiplexed, so transaction div
by simne 5y ago
> Older CPUs - the CPU had a bunch of A pins (address), a bunch of D pins (data).
And on some buses, some or all A/D pins where multiplexed, so transaction divided to address set part and data read/write part.