Programmers aren't going to write codepaths for hardware that doesn't exist, so citing the draft proposal as being when coders would have started writing code i

Programmers aren't going to write codepaths for hardware that doesn't exist, so citing the draft proposal as being when coders would have started writing code is completely off, that's just not how code gets written at all. Xeon Phi was always a very targeted and limited product for HPC. Nobody was doing tons of performance-sensitive JSON parsing or emulating a PS3 or ARM on a Xeon Phi. Emulator people aren't going to target hardware that doesn't exist in their target market. In practice the first time AVX-512 was accessible to the general public was Skylake-X, so 2017. Five years ago. And it was a server/HEDT product. And it had some weird performance regressions (like the downclocking or pausing when you use too many heavy instructions) that bumped it back out of a lot of codebases it might have hypothetically been useful. The first consumer architecture that would have implemented it was massively late due to 10nm delays. So was the 10nm successor to Skylake-X that fixes the downclocking and other shortcomings. Basically the answer here is "10nm". AVX-512 is a casualty of the eternal 10nm delays. Intel got stuck on Skylake forever, and couldn't push any of their other developments forward. They've had fixes for a while for a ton of the stuff people complain about, they just couldn't manufacture them at scale. They are only just launching their first post-14nm server platform literally this year, and it's not even Intel 7/10nm ESF, it's Ice Lake based lol.