Because the logic inside blocks can contain constructs that do stuff that aren't expressible as physical hardware, but are useful for other purposes/otherwise e

Because the logic inside blocks can contain constructs that do stuff that aren't expressible as physical hardware, but are useful for other purposes/otherwise expressible in Verilog (some people think it's an anti-feature such things are even possible to express, but it's open to debate). You still have to implement the content of the blocks somehow, be it grabbing it from a library or writing the logic yourself. I didn't mean to imply that Verilog/VHDL are purely piecing together functional blocks. It's just one of the main abstractions to allow you to compartmentalize, like implementing functions that you can reuse in a traditional programming language. The other reply also goes into some good examples. You could of course only build on top of very simple blocks that are trivially correct like say piecing together logic gates and other very simple circuit elements, but that kinda defeats the purpose of using an HDL and doesn't scale well. Some of the blocks you get included with your development tools might be quite complex, e.g. entire complex DSP operations that are designed to exploit specific hardware features of your target.