3 ms·
Gotcha. Did you run into any issues with yosys given that it has limited system verilog support? Ibex needed to add a pass with sv2v https://github.com/lowRIS
by tsmi 5y ago
Gotcha. Did you run into any issues with yosys given that it has limited system verilog support?
Ibex needed to add a pass with sv2v
https://github.com/lowRISC/ibex/tree/master/syn https://github.com/lowRISC/ibex/tree/master/syn
- Taniwha 5y agoI'm just starting this week, I've recently switched to some use of SV interfaces and it does not like arrays of them - sv2v seems the way to go - but even without that yosys goes bang! somethings too big Vivado compiles the same stuff - I rearchitected the bit that might obviously be doing this but no luck so far.
- mithro 5y agoCheckout Surelog - https://antmicro.com/blog/2020/12/ibex-support-in-verilator-yosys-via-uhdm-surelog/ https://antmicro.com/blog/2020/12/ibex-support-in-verilator-... and the more recent usage in https://github.com/siliconcompiler/siliconcompiler https://github.com/siliconcompiler/siliconcompiler