3 ms·

Author here if anyone has questions...

• tenebrisalietum 5y ago
  I think I saw it on an 8-bit Guy YouTube video - there's a screen clearing circuit. How did that work? If you can't access the shift registers in any method but sequentially how could the circuit clear the screen instantly?
  • jandrese 5y ago
    According to the article the chip was clocked at 1 Mhz and only had 1 kilobit of storage, so you should be able to zero it out in a millisecond, less time than it takes to blit a single frame.
• tlb 5y ago
  How did the firmware modify the data in the shift register to write text? Did it require cycle-accurate delay loops to hit it at just the right cycle?
  • kens 5y ago
    It's pretty clever. One shift register held a bit to indicate the current cursor position. To write a character, the circuit waited until the cursor bit appeared and then updated the character shift registers. At the same time, the cursor bit was delayed to advance it to the next character. Note that you could only write characters sequentially; you couldn't write to arbitrary locations on the screen.
• kragen 5y ago
  Did it use the Intel 1405 shift register chip, like the Datapoint 2200, or a different chip? I can't read the part numbers in the briefcase photo, and if the text names the shift register used, I missed it. With regard to serial memories, you mentioned the EDSAC and the IBM 2260, but maybe it's worth expanding on how common serial memories were; I don't know if you think it's worth mentioning in this context, but delay-line analog memory was in use in PAL TVs and VCRs up to at least the 01980s and I think the 01990s, often made from piezoelectrics and fused quartz, and 01960s digital calculators like the Olivetti Programma 101 used magnetostrictive wire-torsion digital delay lines for their memory https://www.nzeldes.com/HOC/DelayLine.htm https://www.nzeldes.com/HOC/DelayLine.htm, which is possibly something I originally learned from your own blog. Turing's Pilot ACE and the UNIVAC I used mercury delay lines http://ed-thelen.org/comp-hist/vs-univac-mercury-memory.html http://ed-thelen.org/comp-hist/vs-univac-mercury-memory.html, and the LGP-30 used a magnetic drum as a sort of magnetoelectromechanical delay line for its 31-bit "architectural" registers. Also, coaxial and lumped-element analog delay lines (similar to Pupinized telephone lines) enabled analog oscilloscopes to plot signals from before the trigger fired rather than only afterwards. More generally we could get into bubble memory, CCDs, SPI interfaces to RAM, hard disk tracks, etc., as some of the other commenters have mentioned.
  • kens 5y ago
    Thanks for the details on serial memories :-) The Apple-1 display used the Signetics 2504 shift register: https://www.applefritter.com/files/signetics2504.pdf https://www.applefritter.com/files/signetics2504.pdf It also used a Signetics 2519 6x40 shift register to hold one line: https://www.applefritter.com/files/signetics2519.pdf https://www.applefritter.com/files/signetics2519.pdf
    • kragen 5y ago
      Thanks! Maybe their PMOS nature (P-ness?) is the reason for the annoying voltages? I mean a (contemporary) four-phase-logic shift register wouldn't need those voltages, and of course neither do CMOS shift registers. Though I guess a 1024-bit CMOS shift register would still need a pretty good clock drive current, especially if fabbed at those sizes.
• hughrr 5y ago
  No question, just a thank you and appreciation for your excellent articles.
• JKCalhoun 5y ago
  I thought Woz basically used Don Lancaster's TV Typewriter circuitry (also shift-register based memory). https://en.wikipedia.org/wiki/TV_Typewriter https://en.wikipedia.org/wiki/TV_Typewriter
  • kens 5y ago
    The Apple-1 display uses some ideas from the TV Typewriter (shift-register storage, another shift-register for a line, 2513 character ROM). But it is different in many ways, much simpler (the TV typewriter is 4 boards), and improved (24x40 display instead of 16x32 for instance).