> ...evolving your FPGA design on a simulator that doesn't model any of the lower-level physical phenomena Sure, but then you trade away so many degrees of fre

> ...evolving your FPGA design on a simulator that doesn't model any of the lower-level physical phenomena Sure, but then you trade away so many degrees of freedom offered on real hardware. Near the end of the paper Thompson tries porting the algorithm to a different area of silicon, and I think found a "mini-training" of 100 evolutions restored performance. He also speculates about a farm of FPGA's sampled from different batches as you suggest. I suspect in production the engineering approach we take for granted would change - eg. maybe you'd load a "species" template that gets some coarsely close results, then each individual unit is tailored/optimized with a shorter, accelerated training stint. Kind of like how it works in humans (and other creatures who are born with instincts but fimish learning as they grow).