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You could, but then you would need to make sure you have examples from several different batches to avoid behaviour specific to one manufacturing run, and hope

You could, but then you would need to make sure you have examples from several different batches to avoid behaviour specific to one manufacturing run, and hope that going forward the FPGA manufacturer doesn't make any changes which keep the same specification but a different internal implementation... I suspect you'd be better served evolving your FPGA design on a simulator that doesn't model any of the lower-level physical phenomena, and then running the design on real hardware to validate it. But, I know next to nothing about FPGA stuff so I have no idea how useful that would be in reality / how physically accurate the simulation is.

rkagerer 5y ago
> ...evolving your FPGA design on a simulator that doesn't model any of the lower-level physical phenomena Sure, but then you trade away so many degrees of freedom offered on real hardware. Near the end of the paper Thompson tries porting the algorithm to a different area of silicon, and I think found a "mini-training" of 100 evolutions restored performance. He also speculates about a farm of FPGA's sampled from different batches as you suggest. I suspect in production the engineering approach we take for granted would change - eg. maybe you'd load a "species" template that gets some coarsely close results, then each individual unit is tailored/optimized with a shorter, accelerated training stint. Kind of like how it works in humans (and other creatures who are born with instincts but fimish learning as they grow).