2 ms·
> The cost of implementing the 2 overflow bits is absolutely negligible, 2 gates and 2 flip-flops. Much more extra hardware is needed for decoding a few additio
by ansible 5y ago
> The cost of implementing the 2 overflow bits is absolutely negligible, 2 gates and 2 flip-flops. Much more extra hardware is needed for decoding a few additional instructions for flag testing and clearing, but even that is a negligible cost compared with a typical complete RISC-V implementation.
That's understating things considerably.
ARMv8-A has PSTATE, which includes the overflow bit. This explicit state must be saved / restored upon any context switch.
And there isn't just a single PSTATE for an OOO SuperScalar, there are several.
Everything has a cost.