5 ms·
Regular base instructions are always 32-bit, compressed are always 16-bit, and they're always aligned. I don't think there's a problem decoding them in parallel
by audunw 5y ago
Regular base instructions are always 32-bit, compressed are always 16-bit, and they're always aligned. I don't think there's a problem decoding them in parallel. You always know where the opcodes will be located in a 32-bit word - or set of 32-bit words - you're trying to decode.
What I've been wondering is how difficult it is to fuse instructions when the compressed instructions you're trying to fuse isn't aligned to a 32-bit word.
- renox 5y ago> ou always know where the opcodes will be located in a 32-bit word - or set of 32-bit words - you're trying to decode. Uh? In RISC-V with the C extension, 32bit instructions are 16-bits aligned, so no you don't.