So, FWIW, I've been playing around with this. I've got an FPGA board that has an HDMI output[1]. I have a simple 1280 x 720 frame buffer running on it (read the

So, FWIW, I've been playing around with this. I've got an FPGA board that has an HDMI output[1]. I have a simple 1280 x 720 frame buffer running on it (read the DRAM, display it on the monitor. I'm building a carrier board to connect it to an STM32F429 Nucleo-144 board using the ST Micros flexible memory controller (FMC) peripheral. This will present the frame buffer contents to the STM32 as memory. Additionally, some "control registers" are being implemented in the FPGA that can do certain actions. At a minimum they are "clear to one color", "copy region", "scroll region", and "copy glyph". The STM32 has the DMA2 peripheral that does a lot of cool bitblt type functions but these can be nominally slowed down by not synchronizing with the FPGA's schedule for displaying things. The STM32 is running micropython. The "plan", such as it is, is to let the REPL run using the display as its terminal, and a "graphics mode" to reserve parts of the screen for graphics. The small goal is to re-create sort of the VIC-20/C64/ZX Spectrum kind of "vibe" (interpreted language easy access to the graphics) and then build from there. Clearly the basic frame buffer is like 20% of the FPGA so there is lots of room to do other stuff in there. [1] https://www.kickstarter.com/projects/1812459948/minispartan6-a-powerful-fpga-board-and-easy-to-use https://www.kickstarter.com/projects/1812459948/minispartan6...