It wasn't unplanned. The work by marcan on asahi Linux revealed support for multi die configurations baked into the M1 Max. > While working on AIC2 we discove

It wasn't unplanned. The work by marcan on asahi Linux revealed support for multi die configurations baked into the M1 Max. > While working on AIC2 we discovered an interesting feature… while macOS only uses one set of IRQ control registers, there was indeed a full second set, unused and apparently unconnected to any hardware. Poking around, we found that it was indeed a fully working second half of the interrupt controller, and that interrupts delivered from it popped up with a magic “1” in a field of the event number, which had always been “0” previously. Yes, this is the much-rumored multi-die support. The M1 Max SoC has, by all appearances, been designed to support products with two of them in a multi-die module. While no such products exist yet, we’re introducing multi-die support to our AIC2 driver ahead of time. If we get lucky and there are no critical bugs, that should mean that Linux just works on those new 2-die machines, once they are released! https://asahilinux.org/2021/12/progress-report-oct-nov-2021/ https://asahilinux.org/2021/12/progress-report-oct-nov-2021/