3 ms·
On an M1 Max MacBook Pro the CPU (8P+2E) cores peak at a combined ~240GB/s the rest of the advertised 400GB/s memory bandwidth is only useable by the other bus
by crest 5y ago
On an M1 Max MacBook Pro the CPU (8P+2E) cores peak at a combined ~240GB/s the rest of the advertised 400GB/s memory bandwidth is only useable by the other bus masters e.g. GPU, NPU, video encoding/decoding etc.
- paulmd 5y agoSo now the follow-on question I really wanted to ask: if the CPU can't access all the memory channels does that mean it can only address a fraction of the total memory as CPU memory? Or is it a situation where all the channels go into a controller/bus, but the CPU link out of the controller is only wide enough to handle a fraction of the bandwidth?
- brigade 5y agoIt's more akin to how on Intel, each core's L2 has some maximum bandwidth to LLC, and can't individually saturate the total bandwidth available on the ring bus. But Intel doesn't have the LLC <-> RAM bandwidth for that to be generally noticeable.