I think you're referring to AMD's 3D V-Cache, which is already out in their Epyc "Milan X" lineup and forthcoming Ryzen 5800X3D. https://www.amd.com/en/campaign

I think you're referring to AMD's 3D V-Cache, which is already out in their Epyc "Milan X" lineup and forthcoming Ryzen 5800X3D. https://www.amd.com/en/campaigns/3d-v-cache https://www.amd.com/en/campaigns/3d-v-cache Whereas AMD's solution is focused on increasing the cache size (hence the 3D stacking), Apple here seems to be connecting the 2 M1 Max chips more tightly. It's actually more reminiscent of AMD's Infinity Fabric interconnect architecture. https://en.wikichip.org/wiki/amd/infinity_fabric https://en.wikichip.org/wiki/amd/infinity_fabric The interesting part for this M1 Ultra is that Apple opted to connect 2 existing chips, rather than design a new one altogether. Very likely the reason is cost - this M1 Ultra will be a low volume part, as will be future iterations of it. The other approach would've been to design a motherboard that sockets 2 chips, which seems would've been cheaper/faster than this - albeit at expense of performance. But they've designed a new "socket" anyway due to this new chip's much bigger footprint.