Modern SMP systems have NUMA behavior mostly not because of a lack of bandwidth but because of latency. At the speeds modern hardware operates at, the combinati

Modern SMP systems have NUMA behavior mostly not because of a lack of bandwidth but because of latency. At the speeds modern hardware operates at, the combination of distance, SerDes, and other transmission factors result in high latencies when you cross dies - this can't be ameliorated by massively increasing bandwidth via parallel lanes. For context, some server chips which have all the cores on a single die exhibit NUMA behavior purely because there's too many cores to all be physically close to each other geometrically (IIRC the first time I saw this was on an 18 core Xeon, with cores that themselves were a good bit smaller than these). It's probably best to think of this chip as an extremely fast double socket SMP where the two sockets have much lower latency than normal. Software written with that in mind or multiple programs operating fully independent of each other will be able to take massive advantage of this, but most parallel code written for single socket systems will experience reduced gains or even potential losses depending on their parallelism model.