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It is impossible to implement that. The USB standard for some inexplicable reason refused to specify USB 3 to USB 2 transaction translation. That's why it doesn
by marcan_42 5y ago
It is impossible to implement that. The USB standard for some inexplicable reason refused to specify USB 3 to USB 2 transaction translation. That's why it doesn't exist. There is no way to implement it that works as you would expect. It's just not possible. I will never forgive the USB-IF for this gaffe, it is ridiculous.
There are two nonstandard ways to do it. One is what this chip does, which is pretend all USB 2 devices behind it are USB 3. It literally virtualizes and rewrites desctiptors and does a whole pile of horrible hacks to get it to work. It works most of the time, but not always, and it is actually impossible to make it 100% reliable due to peculiarities of the standard. USB is impossible to tunnel or masquerade transparently at the link level due to its design, and since this device tries to do that to bridge incompatible link types, it can never be 100% spec compliant; there will always be corner cases where it breaks down. It's a hack.
The other way, which is implemented by some other niche hub chip whose name I forget, is to use a proprietary protocol to encapsulate USB2 in USB3, effectively making a USB2 host controller that just happens to connect to the host CPU via USB3. That can be done in a 100% spec-compliant and reliable way as far as downstream devices go, but then of course the upstream side is not standard, so you need special drivers for it.
There will never be a USB 2 to USB 3 translating hub that works as you'd expect because it's just not possible to build one, because the USB-IF are notoriously bad at designing standards. Seriously, so much about USB is a giant clusterfuck, from USB2's differential-but-not-really physical layer to the monster that is USB-PD.
- russdill 5y agoThere's two other ways. One is to use a USB 3 to PCI express bridge and then functional pcie USB controller chipsets. I'm not aware of any such bridge silicon existing. The second way is what you said, to skip the bridge and create a USB host controller that connects though via USB. Again, I'm not aware of the existence of any such silicon. Both could be implemented without any standards fuckery. Both would require new silicon and new host OS drivers. You could make your own such device by glueing together USB host and device controllers with an ARM or somesuch. But again, you'd need a host OS driver.
- marcan_42 5y agoBoth of those ways are what I said, done in different ways. PCI-in-USB3 is not a standard protocol. No matter what you do, there is no way to make it work within standard class protocols only. > There's two other ways. One is to use a USB 3 to PCI express bridge and then functional pcie USB controller chipsets. I'm not aware of any such bridge silicon existing. Not USB3, but this is what Thunderbolt docks/hubs do, use embedded PCI USB host controllers for the downstream ports. Which is great! But not for long: the USB-IF took over Thunderbolt and surprise surprise! USB4 includes a new USB3 tunneling mechanism but still not USB2. Yes, really. USB4 docks are expected to still have a ridiculous sidecar USB2 hub just handling USB2 duties and squeezing all that traffic into the USB2 lane all the way to the host. Because that makes sense. Of course, since PCI tunneling is still a thing and standard in USB4, at least you can ignore that nonsense and keep doing it the Thunderbolt way, but I think we're going to see fewer and fewer solutions that do it this way, and USB4 docks which do USB3 tunneling and USB2 passthrough will be a regression over TB3 docks that include full host controllers. You can thank the USB-IF for this. > The second way is what you said, to skip the bridge and create a USB host controller that connects though via USB. Again, I'm not aware of the existence of any such silicon. Such silicon exists, I just can't find it right now. It's another very niche thing in a similar vein to the VL67x from another manufacturer.