I'm the author of the FAQ. Of course the ISA is basically MIPS R6 with encodings and ABI replaced, to the uninitiated, and there is indeed an ongoing case of C

I'm the author of the FAQ. Of course the ISA is basically MIPS R6 with encodings and ABI replaced, to the uninitiated, and there is indeed an ongoing case of CIP United v. Loongson Corporation about the IP rights infringement. Just look at the privileged architecture and it's immediately clear it's just Loongson 3A4000 (a MIPS R5 implementation but with unauthorized and incompatible modifications here and there) only with the decoder stage replaced. As for the "downplaying" of facts then: the original article is in Chinese, for a Chinese audience whose sentiment towards Loongson (or just about any "domestic CPU" development) is quite different from the typical Western think; so I have to tone down a little to maintain neutrality, both for presenting the Loongson side of argument, and for not needlessly enraging the more radical readers. And it certainly seems the translation has this "quality" preserved enough to be noticed... Anyway, although the 3A5000 is remarkably faster than its predecessors and all RISC-V offerings that I know of, and is readily purchasable (which is the main reason I'm doing LoongArch work btw, uptake of this architecture may even help RISC-V in the end), the company may well not be worthwhile to support; it's already an entirely different company from the old Loongson 2F era. As we actually have enough Loongson criticizers even in China, I think I'll edit the FAQ to include more critical opinions (in both versions, of course). And thanks for the frank comment!