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I can't remember the exact criteria that Taleb mentioned that led me to believe that great things might come of RISC-V. So I'll fall back on the "optionality"
by blippage 5y ago
I can't remember the exact criteria that Taleb mentioned that led me to believe that great things might come of RISC-V.
So I'll fall back on the "optionality" argument. Vendors, particularly small vendors, can experiment with RISC-V either free, or very cheaply more so than they can with ARM. Right there, RISC-V opens up a segment that didn't exist before. They'll be more experimentation. When your downsides are limited, but your upside is potentially huge, that's what I mean by "optionality". This is a powerful driver of success.
Naturally, any individual endeavour can fail, but collectively, there's going to be some huge winners.
My prediction is that RISC-V will open up some new category of computing. I can't tell you what it is, who will do it, or when they'll do it, because I don't know. My point is not so much that I can predict what it will be, but merely that there are forces in favour of RISC-V.
I am not, however, predicting the imminent demise of ARM.
I think also that a lot of commentators are viewing things through the lens of what we understand and the received wisdom today. Even - or maybe especially - experts tend to be hemmed in by what is "obvious".
RISC-V is like a genie that's been let out of the bottle. You can't put it back in.
- tyingq 5y agoThe "minion cores"[1] idea from lowrisc.org might be a good early example. You can find something similar for one ARM chip I know of (TI Sitara with PRUs), but only one that I know of...perhaps because it's expensive to experiment like that, as you mention. [1] https://lowrisc.org/docs/memo-2014-001-tagged-memory-and-minion-cores/ https://lowrisc.org/docs/memo-2014-001-tagged-memory-and-min...
- josemanuel 5y agoVendors can experiment with Arm for free with “Arm Flexible Access”!