Yeah, that's a bit ridiculous. The smallest commercial FPGA you can buy, as far as I know, is the smallest MachXO2 with 256 LUTs, and that's already in the "a l

Yeah, that's a bit ridiculous. The smallest commercial FPGA you can buy, as far as I know, is the smallest MachXO2 with 256 LUTs, and that's already in the "a little bit of glue logic" territory. How do they do anything useful with 64 LUTs? With 38 I/Os, you're going to spend all your LUTs just interfacing with them... Am I missing something here? Edit: if this is the right project, then I see most of the I/Os aren't actually user I/Os in this design. https://github.com/Manarabdelaty/Caravel-OpenFPGA-EF https://github.com/Manarabdelaty/Caravel-OpenFPGA-EF