We're going to end up using vetted RISC-V FPGAs, aren't we? It could be that there will be a significant speed / security divide that will only grow; not a fun

We're going to end up using vetted RISC-V FPGAs, aren't we? It could be that there will be a significant speed / security divide that will only grow; not a fun world to live in, but one which might become a necessity.