Even x86 has on-die SRAM that can be used in boot. It's better known as L1, L2, and L3, but you can configure Intel's FSP to make it usable for boot code with t

Even x86 has on-die SRAM that can be used in boot. It's better known as L1, L2, and L3, but you can configure Intel's FSP to make it usable for boot code with the so-called cache-as-RAM feature. The technical details are different than e.g. ARM because it's cache rather than properly addressable memory, but the general idea is the same. All the RAM you see on the motherboard is DRAM. It's a totally separate thing and happens to be what the FSP initializes after it loads stuff into SRAM.