4 ms·
1) This is a distinction without a difference. 2) SRAM is almost always on the die, not external. Here's a die shot of a random STM32 (cortex M): [1]. The SRAM
by AlotOfReading 5y ago
1) This is a distinction without a difference.
2) SRAM is almost always on the die, not external. Here's a die shot of a random STM32 (cortex M): [1]. The SRAM is quite obvious.
[1] https://s.zeptobars.com/GD32F103CBT6-Si-HD.jpg https://s.zeptobars.com/GD32F103CBT6-Si-HD.jpg
- blueflow 5y agoIt is a meaningful distinction. A microprocessor architecture would require support chips, like a south- and north bridge, plus RAM in additional chips. x86 being the classic example. Here [1] is an example of a microprocessor board, you can see the MX support chips on both sides of the CPU. As you can see, the RAM (and the most of the address space-mapped things) is not on-chip. The bus is wired across the PCB. [1] https://upload.wikimedia.org/wikipedia/commons/d/de/386DX40_MB_Jaguar_V.jpg https://upload.wikimedia.org/wikipedia/commons/d/de/386DX40_...
- deleted 5y ago[deleted]
- AlotOfReading 5y agoEven x86 has on-die SRAM that can be used in boot. It's better known as L1, L2, and L3, but you can configure Intel's FSP to make it usable for boot code with the so-called cache-as-RAM feature. The technical details are different than e.g. ARM because it's cache rather than properly addressable memory, but the general idea is the same. All the RAM you see on the motherboard is DRAM. It's a totally separate thing and happens to be what the FSP initializes after it loads stuff into SRAM.