> For the same sized single-core chip (x mm squared), running at the same voltage and same clock speed, on the same manufacturing process node, is there a (sign

> For the same sized single-core chip (x mm squared), running at the same voltage and same clock speed, on the same manufacturing process node, is there a (significant) difference between ARM and Risk-V? Very many. And they are at the CPU implementation level. The instruction decoding buffer depth, the register file size, the implementation of the out of order execution, the TLB depth, the data bus width, separate hardware assist engines etc are amongst many other conscious and decisive design decisions that can differentiate separate designs. Even at the same (citing verbatim) «voltage and same clock speed, on the same manufacturing process node» the performance can vary wildy. The M1 CPU family is a very wide implementation in nearly every aspect, with a very large L1 cache (both, I and D, caches), reasonably large L2 cache, a (reportedly) 380 register wide register file, 512-bit wide data bus (in the M1 Max) plus extras, hence why it outperforms competing ARM64 designs running at similar voltages and frequencies. The same is true for POWER CPU's (i.e. compare POWER9 vs POWER10 designs) – POWER10 is 2.6x faster than POWER9 despite running at similar frequencies – due to a substantial design overhaul. Holistic system design matters, not the ISA alone.