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Can someone please explain RISC to me? I gather that it is a direct competitor to ARM. By extension it competes with Intel and AMD [and NVidia?] - as phones s

Can someone please explain RISC to me? I gather that it is a direct competitor to ARM. By extension it competes with Intel and AMD [and NVidia?] - as phones swallow the world, Both Apple and MS have ARM desktop OS's, and the big boys like Adobe are rewriting for ARM. But I don't see how RISC has any hope, as ARM is already everywhere, and so much software has been written, and is being converted to being ARM compatible. In fact, I don't see how x64 has any real future! What am I missing with both AMD and RISC? How does RISC get such good press? And - OT - how anyone choose a name which projects the concept of being risky ;)

capableweb 5y ago
I'm no expert, but in lieu of not having any sibling comments yet, let me offer my amateur view: The name RISC-V (which I'm supposing you're referring to) comes from "reduced instruction set computer (RISC)" (from around 1980s), with a added "five". It's a instruction set architecture (ISA) which is basically a abstract specification for how a CPUs instructions could be. RISC-V is not a company, but a "open standard" for this ISA. While ARM for example both maintains a ISA, runs a company and builds chips, RISC-V is maintained by a foundation which many companies are a part of. RISC-V is exciting because it's one of the few open standard ISA with a lot of public references and available material for curious hackers, compared to what we've seen before. So far, the performance and the power consumption (as far as I know) hasn't been as optimized as other architectures, so it's still early to tell if it'll have some larger impact on the industry at large or not.
AceJohnny2 5y ago
Intel and AMD are focused on the x86(-64) ISA, with a strong presence in the desktop and server space [1]. ARM is everywhere mobile, they really cornered the "low-power" (ie energy) space way ahead of Intel and AMD. They provide a great ecosystem of IPs and tools around them. Think of them as the "battery's included" DIY provider for building chips. But both of the above generally target general-purpose CPUs [2], the one you usually think as being the core of your computer. But there are others! DSPs have dedicated instructions for saturated math (no overflow/rollover) and multiply-accumulate, GPUs are DSPs on steroids, and there's otherwise an entire spectrum of complexity you can have from your 8-bit integer microcontroller that doesn't even have a divide instruction, all the way up to the massively-parallel floating-point processors. Problem is, that spectrum was divided between many different proprietary ISAs, each with their various levels of tool sophistication and support. RISC-V is based on the idea that we can do a better job unifying the ISAs across this spectrum of processor complexity. It's an extensible ISA that starts with basic integer-only operations and direct addressing, and can extend with instructions for more sophisticated operations such as adding 32-bit floating operations, 64-bit float, supervisor mode, hypervisor mode, SIMD... All of which can share a common ecosystem of compilers, formal verification, debuggers... But the real popularity of RISC-V is that you can use its ISA, and design a chip around it, freely without having to pay a (expensive!) license to ARM. This does present an existential threat to ARM, although they have a strong head-start in offering a ready-made ecosystem of tools. Do you want to spend $10M in engineering manpower and experimental silicon tape-out designing your new chip? Or just pay $2M to ARM to license their known-good CPU? It takes a lot of effort, expertise (and iteration!) to design a CPU core that's as performant and feature-full as what ARM spent years (decades!) perfecting. Do companies choose RISC-V because it allows them to re-use their tools on novel chip designs, or because it's just cheaper and, new as it is, sufficient for their purposes? It's exciting to watch the development. (Also I can't help but notice that many of the RISC-V chip announcements are coming from China) [1] Fun fact: in the 80s and 90s, x86 was the "cheap, consumer" chip that was looked down upon by the Workstation class RISC-type chips like the Sun Sparc, or DEC Alpha (and much of Apple's chip design team sprang from a core of ex-DEC designers!) But Linux came along, Intel kept improving their chips, and took over the workstation/big-iron space from the incumbents [2] cue the corrections about ARM's (and Intel's!) GPU design, co-processor architecture...
bsder 5y ago
> But I don't see how RISC has any hope, as ARM is already everywhere You are ignoring the very low end. ARM requires a royalty. It's not much, but it is what it is. RISC-V requires no such royalty (that I know of). At the lowest end kind of chips, a fraction of a penny royalty is a big deal. Currently, those chips currently all use proprietary designs. All the tools supporting those chips are absolute trash, as expected. Converging to a single architecture that can use all the same design tools and software ecosystem would be a big win. I view RISC-V like I view autoformatters. It actually kinda sucks, nobody likes it very much, but converging to a single point brings more benefits than holding to your own unique opinions. Aside: If I had my drothers, I'd converge backward to something like DEC Alpha EV-4/EV-5 (21064/21164). EV-4 was good enough to provide the basis for the StrongARM architecture. The software tooling for those chips still exists even if a bit dusty. MIPS dumb-ass byte access patents have long expired so we can have real byte access instructions. And in-order execution is often a plus in the embedded world rather than a minus.
randomhodler84 5y ago
The R in ARM means risc. So arm must be advanced risky.
throwaway4good 5y ago
I think you meant to write RISC-V and not just RISC.

capableweb 5y ago

I'm no expert, but in lieu of not having any sibling comments yet, let me offer my amateur view: The name RISC-V (which I'm supposing you're referring to) comes from "reduced instruction set computer (RISC)" (from around 1980s), with a added "five". It's a instruction set architecture (ISA) which is basically a abstract specification for how a CPUs instructions could be. RISC-V is not a company, but a "open standard" for this ISA. While ARM for example both maintains a ISA, runs a company and builds chips, RISC-V is maintained by a foundation which many companies are a part of. RISC-V is exciting because it's one of the few open standard ISA with a lot of public references and available material for curious hackers, compared to what we've seen before. So far, the performance and the power consumption (as far as I know) hasn't been as optimized as other architectures, so it's still early to tell if it'll have some larger impact on the industry at large or not.

AceJohnny2 5y ago

Intel and AMD are focused on the x86(-64) ISA, with a strong presence in the desktop and server space [1]. ARM is everywhere mobile, they really cornered the "low-power" (ie energy) space way ahead of Intel and AMD. They provide a great ecosystem of IPs and tools around them. Think of them as the "battery's included" DIY provider for building chips. But both of the above generally target general-purpose CPUs [2], the one you usually think as being the core of your computer. But there are others! DSPs have dedicated instructions for saturated math (no overflow/rollover) and multiply-accumulate, GPUs are DSPs on steroids, and there's otherwise an entire spectrum of complexity you can have from your 8-bit integer microcontroller that doesn't even have a divide instruction, all the way up to the massively-parallel floating-point processors. Problem is, that spectrum was divided between many different proprietary ISAs, each with their various levels of tool sophistication and support. RISC-V is based on the idea that we can do a better job unifying the ISAs across this spectrum of processor complexity. It's an extensible ISA that starts with basic integer-only operations and direct addressing, and can extend with instructions for more sophisticated operations such as adding 32-bit floating operations, 64-bit float, supervisor mode, hypervisor mode, SIMD... All of which can share a common ecosystem of compilers, formal verification, debuggers... But the real popularity of RISC-V is that you can use its ISA, and design a chip around it, freely without having to pay a (expensive!) license to ARM. This does present an existential threat to ARM, although they have a strong head-start in offering a ready-made ecosystem of tools. Do you want to spend $10M in engineering manpower and experimental silicon tape-out designing your new chip? Or just pay $2M to ARM to license their known-good CPU? It takes a lot of effort, expertise (and iteration!) to design a CPU core that's as performant and feature-full as what ARM spent years (decades!) perfecting. Do companies choose RISC-V because it allows them to re-use their tools on novel chip designs, or because it's just cheaper and, new as it is, sufficient for their purposes? It's exciting to watch the development. (Also I can't help but notice that many of the RISC-V chip announcements are coming from China) [1] Fun fact: in the 80s and 90s, x86 was the "cheap, consumer" chip that was looked down upon by the Workstation class RISC-type chips like the Sun Sparc, or DEC Alpha (and much of Apple's chip design team sprang from a core of ex-DEC designers!) But Linux came along, Intel kept improving their chips, and took over the workstation/big-iron space from the incumbents [2] cue the corrections about ARM's (and Intel's!) GPU design, co-processor architecture...

bsder 5y ago

> But I don't see how RISC has any hope, as ARM is already everywhere You are ignoring the very low end. ARM requires a royalty. It's not much, but it is what it is. RISC-V requires no such royalty (that I know of). At the lowest end kind of chips, a fraction of a penny royalty is a big deal. Currently, those chips currently all use proprietary designs. All the tools supporting those chips are absolute trash, as expected. Converging to a single architecture that can use all the same design tools and software ecosystem would be a big win. I view RISC-V like I view autoformatters. It actually kinda sucks, nobody likes it very much, but converging to a single point brings more benefits than holding to your own unique opinions. Aside: If I had my drothers, I'd converge backward to something like DEC Alpha EV-4/EV-5 (21064/21164). EV-4 was good enough to provide the basis for the StrongARM architecture. The software tooling for those chips still exists even if a bit dusty. MIPS dumb-ass byte access patents have long expired so we can have real byte access instructions. And in-order execution is often a plus in the embedded world rather than a minus.

randomhodler84 5y ago

The R in ARM means risc. So arm must be advanced risky.

throwaway4good 5y ago

I think you meant to write RISC-V and not just RISC.